Access PCI-DIO-24D(H) Manual do Utilizador Página 1

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Chapter 2: Installation A printed Quick-Start Guide (QSG) is packed with the card for your convenience. If you’ve already performed the steps from th

Hardware Installation 1. Make sure to set switches and jumpers from either the Option Selection section of this manual or from the suggestions of SE

Chapter 3: Option Selection Refer to the setup programs on the CD provided with the card. Also, refer to the Block Diagram and the Option Selection M

3.9"4.8"IRQDINT EXTIRQTINTENINTSEL0TSTBEN Figure 3-1: Option Selection Map version D Figure 3-2: Option Selection Map version H Manual

Chapter 4: Address Selection These cards use one address space and occupy sixteen I/O locations. The S03 (which has 3 counters) version takes up 32 I

Chapter 5: Software There are sample programs provided with the card in C, Pascal, QuickBASIC, and several Windows languages. DOS samples are located

Chapter 6: Programming These cards are I/O-mapped devices that are easily configured from any language and any language can easily perform digital I/

These cards use an 8255-5 PPI to provide a total of 24 bits input/output capability. The card is designed to use the PPI in Mode 0 wherein: a. Ther

c. Now, if any of the ports are to be set as outputs, you may set the values to that port with the outputs still in the tristate condition. (If all p

Programming Example (C) The following program fragment in C language illustrates the foregoing: const BASE_ADDRESS 0x300; outportb(BASE_ADDRESS

Notice The information in this document is provided for reference only. ACCES does not assume any liability arising out of the applicati

Enabling/Disabling I/O Buffers When using the tristate mode (Jumper in the TST position), the method to disable the I/O buffers involved writing a co

Chapter 7: 8254 Counter/Timer These cards have the option of one, two, or three 82C54 counter(s) that each include three 16-bit counter/timers factor

Counter/Timer Registers Base + 10 Write/Read: Counter#A0 When writing, this register is used to load a count value into the counter. The transfer is

Programming the 8254The counters are programmed by writing a control byte into the counter control register. Refer to the previous register map for th

Reading and Loading the Counters If you attempt to read the counters on the fly when there is a high input frequency, you will most likely get erroneo

1st Read: Status byte 2nd Read: Low byte of latched data 3rd Read: High byte of latched data After any latching operation on a counter, t

Pulse Width The Pulse Width function will measure the width of an applied event from its rise to its fall (effectively one half the period). The Base

Chapter 8: Connector Pin Assignments The H card has a 50-pin connector provided on the back plate of these cards for I/O connections. The mating conn

The D card has a 37-pin D-sub connector provided on the back plate of these cards for I/O connections. If all three counters are present, pin 20 is

Customer Comments If you experience any problems with this manual or just want to give us some feedback, please email us at: [email protected]. Pl

Warranty Prior to shipment, ACCES equipment is thoroughly inspected and tested to applicable specifications. However, should equipment failure occur,

Table of Contents Chapter 1: Introduction... 5 Specifica

Chapter 1: Introduction Features • 24 Bits of Digital Input/Output. • All 24 I/O Lines Buffered on the Card. • I/O Buffers Can Be Tri-stated

output use according to direction assignment from a control register in the PPI. Further, if a jumper is properly placed on the card, the tristate buf

Specifications Digital Inputs (TTL Compatible) • Logic High: 2.0 to 5.0 VDC • Logic Low: -0.5 to +0.8 VDC • Load: ±20 μA Digital Ou

Figure 1-1: Card D or H Block DiagramManual PCI-DIO-24DH 8

Optional Counter/TimersThese cards have options to include one, two, or three 82C54 counter(s) that each include three 16-bit counter/timers factory c